From: Kees Jongenburger Date: Thu, 16 May 2013 08:11:12 +0000 (+0200) Subject: arm:vm caching fix. X-Git-Tag: v3.3.0~980 X-Git-Url: http://zhaoyanbai.com/repos/tz-link.htm?a=commitdiff_plain;h=refs%2Fchanges%2F65%2F565%2F1;p=minix.git arm:vm caching fix. Improve reliability by using write trough cache. --- diff --git a/kernel/arch/earm/memory.c b/kernel/arch/earm/memory.c index 7d2123ada..00de13ea7 100644 --- a/kernel/arch/earm/memory.c +++ b/kernel/arch/earm/memory.c @@ -103,7 +103,7 @@ static phys_bytes createpde( pdeval = (linaddr & ARM_VM_SECTION_MASK) | ARM_VM_SECTION | ARM_VM_SECTION_DOMAIN - | ARM_VM_SECTION_WT + | ARM_VM_SECTION_DEVICE | ARM_VM_SECTION_USER; } @@ -684,6 +684,7 @@ static int device_mem_mapping_index = -1, char *device_mem; +/* defined in kernel.lds */ extern char usermapped_start, usermapped_end, usermapped_nonglo_start; int arch_phys_map(const int index, diff --git a/kernel/arch/earm/pg_utils.c b/kernel/arch/earm/pg_utils.c index 2895aa314..b2d696d1e 100644 --- a/kernel/arch/earm/pg_utils.c +++ b/kernel/arch/earm/pg_utils.c @@ -200,7 +200,6 @@ void vm_enable_paging(void) /* Enable MMU */ sctlr |= SCTLR_M; - /* AFE set to zero (default reset value): not using simplified model. */ /* TRE set to zero (default reset value): TEX[2:0] are used, plus C and B bits.*/ sctlr &= ~SCTLR_TRE; diff --git a/servers/vm/arch/i386/pagetable.c b/servers/vm/arch/i386/pagetable.c index 0cb8a62ae..8008f1138 100644 --- a/servers/vm/arch/i386/pagetable.c +++ b/servers/vm/arch/i386/pagetable.c @@ -301,7 +301,7 @@ void *vm_mappages(phys_bytes p, int pages) if((r=pt_writemap(vmprocess, pt, loc, p, VM_PAGE_SIZE*pages, ARCH_VM_PTE_PRESENT | ARCH_VM_PTE_USER | ARCH_VM_PTE_RW #if defined(__arm__) - | ARM_VM_PTE_WB + | ARM_VM_PTE_WT #endif , 0)) != OK) { printf("vm_mappages writemap failed\n"); @@ -409,7 +409,7 @@ void vm_pagelock(void *vir, int lockflag) #if defined(__arm__) else flags |= ARCH_VM_PTE_RO; - flags |= ARM_VM_PTE_WB | ARM_VM_PTE_S ; // LSC FIXME + flags |= ARM_VM_PTE_WT ; #endif /* Update flags. */ @@ -689,7 +689,7 @@ int pt_ptmap(struct vmproc *src_vmp, struct vmproc *dst_vmp) #elif defined(__arm__) if((r=pt_writemap(dst_vmp, &dst_vmp->vm_pt, viraddr, physaddr, ARCH_PAGEDIR_SIZE, ARCH_VM_PTE_PRESENT | ARCH_VM_PTE_USER | - ARM_VM_PTE_WB | ARM_VM_PTE_S, //LSC FIXME + ARM_VM_PTE_WT , #endif WMF_OVERWRITE)) != OK) { return r; @@ -715,7 +715,7 @@ int pt_ptmap(struct vmproc *src_vmp, struct vmproc *dst_vmp) if((r=pt_writemap(dst_vmp, &dst_vmp->vm_pt, viraddr, physaddr, VM_PAGE_SIZE, ARCH_VM_PTE_PRESENT | ARCH_VM_PTE_USER | ARCH_VM_PTE_RW #ifdef __arm__ - | ARM_VM_PTE_WB + | ARM_VM_PTE_WT #endif , WMF_OVERWRITE)) != OK) { @@ -874,6 +874,7 @@ int pt_writemap(struct vmproc * vmp, /* If we expect a writable page, allow a readonly page. */ maskedentry &= ~ARCH_VM_PTE_RO; } + maskedentry &= ~(ARM_VM_PTE_WB|ARM_VM_PTE_WT); #endif if(maskedentry != entry) { printf("pt_writemap: mismatch: "); @@ -1377,7 +1378,7 @@ int pt_mapkernel(pt_t *pt) pt->pt_dir[kern_pde] = (addr & ARCH_VM_PDE_MASK) | ARM_VM_SECTION | ARM_VM_SECTION_DOMAIN - | ARM_VM_SECTION_WB + | ARM_VM_SECTION_WT | ARM_VM_SECTION_SUPER; #endif kern_pde++; @@ -1412,8 +1413,7 @@ int pt_mapkernel(pt_t *pt) assert(!pt->pt_dir[map_pde]); pt->pt_dir[map_pde] = addr | ARM_VM_SECTION | ARM_VM_SECTION_DOMAIN | - ARM_VM_SECTION_WB | - ARM_VM_SECTION_SHAREABLE | + ARM_VM_SECTION_DEVICE | ARM_VM_SECTION_SUPER; addr += ARCH_BIG_PAGE_SIZE; } diff --git a/servers/vm/region.c b/servers/vm/region.c index a77f415dd..53611931d 100644 --- a/servers/vm/region.c +++ b/servers/vm/region.c @@ -270,7 +270,8 @@ int map_ph_writept(struct vmproc *vmp, struct vir_region *vr, #if defined(__arm__) if (pb->phys >= 0x80000000 && pb->phys < (0xc0000000 - VM_PAGE_SIZE)) { // LSC Do this only for actual RAM - flags |= ARM_VM_PTE_WT; + // KEJO:fishy will need to look into this + flags |= ARM_VM_PTE_DEVICE; } #endif