From 34b517ab12f2f2325b86be0ad19b995a9e243951 Mon Sep 17 00:00:00 2001
From: Kees Jongenburger <kees.jongenburger@gmail.com>
Date: Wed, 25 Sep 2013 10:38:54 +0200
Subject: [PATCH] arm:caching mark normal memory cacheable during identity
 mapping.

Change-Id: I7cd8da168744a3f32276803e99e8af0fea772574
---
 kernel/arch/earm/pg_utils.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/kernel/arch/earm/pg_utils.c b/kernel/arch/earm/pg_utils.c
index 512623df1..df5930691 100644
--- a/kernel/arch/earm/pg_utils.c
+++ b/kernel/arch/earm/pg_utils.c
@@ -157,10 +157,15 @@ void pg_identity(kinfo_t *cbi)
 	 for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
 		u32_t flags = ARM_VM_SECTION
 			| ARM_VM_SECTION_USER
-			| ARM_VM_SECTION_DEVICE
 			| ARM_VM_SECTION_DOMAIN;
+
 		phys = i * ARM_SECTION_SIZE;
-		pagedir[i] =  phys | flags;
+		/* mark mormal memory as cacheable. TODO: fix hard coded values */
+		if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END){
+			pagedir[i] =  phys | flags | ARM_VM_SECTION_CACHED;
+		} else {
+			pagedir[i] =  phys | flags | ARM_VM_SECTION_DEVICE;
+		}
         }
 }
 
-- 
2.44.0