arm:caching mark normal memory cacheable during identity mapping.

Change-Id: I7cd8da168744a3f32276803e99e8af0fea772574

diff --git a/kernel/arch/earm/pg_utils.c b/kernel/arch/earm/pg_utils.c
index 512623df1697f7334cd0639db53fe0bb85c8c063..df5930691eeb22a1c5510a92966c75c300212a3e 100644 (file)
--- a/kernel/arch/earm/pg_utils.c
+++ b/kernel/arch/earm/pg_utils.c
@@ -157,10 +157,15 @@ void pg_identity(kinfo_t *cbi)
         for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
                u32_t flags = ARM_VM_SECTION
                        | ARM_VM_SECTION_USER
-                       | ARM_VM_SECTION_DEVICE
                        | ARM_VM_SECTION_DOMAIN;
+
                phys = i * ARM_SECTION_SIZE;
-               pagedir[i] =  phys | flags;
+               /* mark mormal memory as cacheable. TODO: fix hard coded values */
+               if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END){
+                       pagedir[i] =  phys | flags | ARM_VM_SECTION_CACHED;
+               } else {
+                       pagedir[i] =  phys | flags | ARM_VM_SECTION_DEVICE;
+               }
         }
 }