From: AceVest Date: Tue, 8 Dec 2015 12:30:52 +0000 (+0800) Subject: learn go X-Git-Url: http://zhaoyanbai.com/repos/Bv9ARM.ch08.html?a=commitdiff_plain;h=468e8b4fb6a3775e0917f4603e9eb4aec6c1aaad;p=acecode.git learn go --- diff --git a/ish/Cmd.cc b/ish/Cmd.cc index 1f4f481..eb3355f 100644 --- a/ish/Cmd.cc +++ b/ish/Cmd.cc @@ -166,6 +166,7 @@ ExitCode cmd::ExecuteCommand(char **argv) //} + return 0; } #ifdef DEBUG_CMD diff --git a/ish/Common.cc b/ish/Common.cc index b6384d4..bb7ee73 100644 --- a/ish/Common.cc +++ b/ish/Common.cc @@ -4,7 +4,7 @@ void fatal(const char *err_msg, int n) { - fprintf(stderr,"Error: %s,%s\n",err_msg); + fprintf(stderr,"Error: %s\n",err_msg); exit(n); } void *my_malloc(size_t size) diff --git a/ish/Parser.cc b/ish/Parser.cc index 58266c1..2b300aa 100644 --- a/ish/Parser.cc +++ b/ish/Parser.cc @@ -244,7 +244,9 @@ ExitCode Parser::ExecuteCmd() g_redirectInFlag = g_redirectOutFlag = false; + return 0; } + ExitCode Parser::Exp() { /*if(m_token != STRING && m_token != GETVAR) diff --git a/ish/Scanner.cc b/ish/Scanner.cc index bcd6c51..b56fca1 100644 --- a/ish/Scanner.cc +++ b/ish/Scanner.cc @@ -275,6 +275,7 @@ void Scanner::printToken(TokenType t) const case GE: cout<<"GE"< -using namespace std; - -int main(int argc, char *argv[]) { - - cout << "Server is Starting ... " << endl; - return 0; -} diff --git a/tools/comm/cpuid.cc b/tools/comm/cpuid.cc index 77bae5c..9ba8ae7 100644 --- a/tools/comm/cpuid.cc +++ b/tools/comm/cpuid.cc @@ -108,17 +108,47 @@ int main() "CR4.OSFXSR is available)") TEST_FEATURE(fv, 25, "SSE: SSE Extensions") TEST_FEATURE(fv, 26, "SSE2: SSE2 Extensions") - //TEST_FEATURE(fv, 27, "Reserved") + TEST_FEATURE(fv, 27, "SS: CPU Cache Supports Self-Snoop") TEST_FEATURE(fv, 28, "Hyper Threading Technology") TEST_FEATURE(fv, 29, "TM: Thermal Monitor") - //TEST_FEATURE(fv, 30, "Reserved") + TEST_FEATURE(fv, 30, "IA64 Processor Emulating X86") TEST_FEATURE(fv, 31, "PBE: Pending Break Enable") - - - - + fv = r.ecx; + printf("-------------\n"); + TEST_FEATURE(fv, 0, "SSE3: Prescott New Instructions-SSE3 (PNI)") + TEST_FEATURE(fv, 1, "PCLMULQDQ Support") + TEST_FEATURE(fv, 2, "64Bit Debug Store (EDX Bit21)") + TEST_FEATURE(fv, 3, "MONITOR and MWAIT Instructions (SSE3)") + TEST_FEATURE(fv, 4, "CPL Qualified Debug Store") + TEST_FEATURE(fv, 5, "VMX: Virtual Machine eXtensions") + TEST_FEATURE(fv, 6, "SMX: Safer Mode Extensions") + TEST_FEATURE(fv, 7, "EST: Enhanced SpeedStep") + TEST_FEATURE(fv, 8, "TM2: Thermal Monitor 2") + TEST_FEATURE(fv, 9, "SSSE3: Supplemental SSE3 Instructions") + TEST_FEATURE(fv, 10, "L1 Context ID") + TEST_FEATURE(fv, 11, "SDBG: Silicon Debug Interface") + TEST_FEATURE(fv, 12, "FMA: Fused Multiply-add (FMA3)") + TEST_FEATURE(fv, 13, "CX16: CMPXCHG16B Instructions") + TEST_FEATURE(fv, 14, "XTPR: Can Disable Sending Task Priority Messages") + TEST_FEATURE(fv, 15, "PDCM: Perfmon & Debug Capability") + //TEST_FEATURE(fv, 16, "Reserved") + TEST_FEATURE(fv, 17, "PCID: Process Context Identifiers (CR4 bit 17)") + TEST_FEATURE(fv, 18, "DCA: Direct Cache Access for DMA Writes") + TEST_FEATURE(fv, 19, "SSE4.1: SSE4.1 Instructions") + TEST_FEATURE(fv, 20, "SSE4.2: SSE4.2 Instructions") + TEST_FEATURE(fv, 21, "X2APIC: x2APIC Support") + TEST_FEATURE(fv, 22, "MOVBE: MOVBE Instruction (big-endian)") + TEST_FEATURE(fv, 23, "POPCNT: POPCNT Instruction") + TEST_FEATURE(fv, 24, "TSC-DEADLINE: APIC Supports One-Shot Operation Using a TSC Deadline Value") + TEST_FEATURE(fv, 25, "AES: AES Instruction Set") + TEST_FEATURE(fv, 26, "XSAVE: XSAVE, XRESTOR, XSETBV, XGETBV") + TEST_FEATURE(fv, 27, "OSXSAVE: XSAVE Enabled by OS") + TEST_FEATURE(fv, 28, "AVX: Advanced Vector Extensions") + TEST_FEATURE(fv, 29, "F16C: F16C (Half-Precision) FP Support") + TEST_FEATURE(fv, 30, "RDRND: RDRAND (On-Chip Random Number Generator) Support") + TEST_FEATURE(fv, 31, "HYPERVISOR: Running on a Hypervisor (Always 0 on a Real CPU, But Also With Some Hypervisors") /**********************Get CPU's SERIAL Number*********************/