From 3537cffae510168b6d32640ff38609a38143c7db Mon Sep 17 00:00:00 2001 From: acevest Date: Wed, 17 May 2023 22:57:43 +0800 Subject: [PATCH] =?utf8?q?PCI=E7=AB=AF=E5=8F=A3=E6=96=B0=E7=9A=84=E6=9B=B4?= =?utf8?q?=E7=9B=B4=E8=A7=82=E7=9A=84=E6=93=8D=E4=BD=9C=E6=A8=A1=E5=BC=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit --- drivers/pci.c | 64 ++++++++++++++++++++++++++++++++++++++------------- include/pci.h | 15 +++++++----- 2 files changed, 57 insertions(+), 22 deletions(-) diff --git a/drivers/pci.c b/drivers/pci.c index 156f5a0..74db154 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -23,35 +23,67 @@ LIST_HEAD(pci_devs); const char *pci_get_info(unsigned int classcode, unsigned int progif); -int pci_read_config_byte(int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); - return inb(PCI_DATA + (PCI_GET_CMD_REG(reg) & 3)); +#if PCI_RW_ALIGN_MODE +int pci_read_config_byte(int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); + return inb(PCI_DATA + (PCI_GET_CMD_REG(cmd) & 3)); } -int pci_read_config_word(int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); - return inw(PCI_DATA + (PCI_GET_CMD_REG(reg) & 2)); +int pci_read_config_word(int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); + return inw(PCI_DATA + (PCI_GET_CMD_REG(cmd) & 2)); } -int pci_read_config_long(int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); +int pci_read_config_long(int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); return inl(PCI_DATA); } -void pci_write_config_byte(int value, int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); - outb(value & 0xFF, PCI_DATA + (reg & 3)); +void pci_write_config_byte(int value, int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); + outb(value & 0xFF, PCI_DATA + (cmd & 3)); } -void pci_write_config_word(int value, int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); - outw(value & 0xFFFF, PCI_DATA + (reg & 2)); +void pci_write_config_word(int value, int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); + outw(value & 0xFFFF, PCI_DATA + (cmd & 2)); } -void pci_write_config_long(int value, int reg) { - outl(PCI_CONFIG_CMD(reg), PCI_ADDR); +void pci_write_config_long(int value, int cmd) { + outl(PCI_CONFIG_CMD(cmd), PCI_ADDR); outl(value, PCI_DATA); } +#else +int pci_read_config_byte(int cmd) { + outl(cmd, PCI_ADDR); + return inb(PCI_DATA); +} + +int pci_read_config_word(int cmd) { + outl(cmd, PCI_ADDR); + return inw(PCI_DATA); +} + +int pci_read_config_long(int cmd) { + outl(cmd, PCI_ADDR); + return inl(PCI_DATA); +} + +void pci_write_config_byte(int value, int cmd) { + outl(cmd, PCI_ADDR); + outb(value & 0xFF, PCI_DATA); +} + +void pci_write_config_word(int value, int cmd) { + outl(cmd, PCI_ADDR); + outw(value & 0xFFFF, PCI_DATA); +} + +void pci_write_config_long(int value, int cmd) { + outl(cmd, PCI_ADDR); + outl(value, PCI_DATA); +} +#endif void scan_pci_bus(int bus) { u8 dev, devfn; diff --git a/include/pci.h b/include/pci.h index 10f4160..4120007 100644 --- a/include/pci.h +++ b/include/pci.h @@ -22,6 +22,15 @@ #define PCI_ADDR 0xCF8 // CONFIG_ADDRESS #define PCI_DATA 0xCFC // CONFIG_DATA +// PCI Command +// 这个PCI_CMD是写入PCI_ADDR的,通过bus,dev,fn,reg可以定位到某个PCI总线(可以有多条PCI总线)上的某个设备的某个功能的某个寄存器 +#define PCI_CMD(bus, dev, fn, reg) (0x80000000 | (bus << 16) | (dev << 11) | (fn << 8) | reg) + +#if PCI_RW_ALIGN_MODE +#define PCI_CONFIG_CMD(cmd) (cmd & ~3) +#define PCI_GET_CMD_REG(cmd) (cmd & 0xFF) +#endif + // PCI Device // All PCI compliant devices must support the Vendor ID, Device ID, Command and Status, Revision ID, Class Code and // Header Type fields.Implementation of the other registers is optional, depending upon the devices functionality. @@ -178,12 +187,6 @@ typedef union pci_device #define PCI_MINGNT 0x3E #define PCI_MAXLAT 0x3F -// PCI Command Register -#define PCI_CMD(bus, dev, devfn, reg) (0x80000000 | (bus << 16) | (dev << 11) | (devfn << 8) | reg) - -#define PCI_CONFIG_CMD(cmd) (cmd & ~3) -#define PCI_GET_CMD_REG(cmd) (cmd & 0xFF) - /* PCI IDS */ // Display #define PCI_BASE_CLASS_DISPLAY 0x03 -- 2.44.0