__aeabi_ldivmod: fix sign logic

	. signed 64-bit divide incorrectly tested for sign compensation
	  bits in the NEG (R5) register, causing the signedness of the
	  quotient and modulus to be wrong for negative numerators.

Fixes test45 on ARM.

Change-Id: Id0df8fd97ea67cd0722db8cdd70a07e01b3d7870

diff --git a/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S b/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S
index 041ce8558bfbdaed8c5cc5f7d55f8b10f5d6fc45..259ff63fe3d10c344effef70c3273b6aab6194ee 100644 (file)
--- a/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S
+++ b/common/lib/libc/arch/arm/quad/__aeabi_ldivmod.S
@@ -80,9 +80,9 @@ ENTRY(__aeabi_ldivmod)
 
        pop     {r2, r3}
        tst     NEG, #2         /* does remainder need to be negative? */
-       bleq    .Lnegate_b
+       blne    .Lnegate_b
        tst     NEG, #1         /* does quotient need to be negative? */
-       bleq    .Lnegate_a
+       blne    .Lnegate_a
        pop     {r4-r5, sl, lr}
        RET