cq->head = 0;
cq->tail = 0;
init_wait_queue(&cq->wait);
+
//cq->data = kmalloc(CNSL_QUEUE_SIZE, 0);
printk("console queue data addr %08x\n", cq->data);
+++ /dev/null
-/*
- *--------------------------------------------------------------------------
- * File Name: hd.c
- *
- * Author: Zhao Yanbai [zhaoyanbai@126.com]
- * Mon Feb 1 15:26:55 2010
- *
- * Description: none
- *
- *--------------------------------------------------------------------------
- */
-#include <io.h>
-#include <hd.h>
-#include <irq.h>
-#include <pci.h>
-#include <system.h>
-
-
-#define IDE_COMMAND 0
-#define IDE_STATUS 2
-#define IDE_PRDT 4
-
-
-
-unsigned long iobase = 0;
-//void hd_handler(pt_regs_t * regs, unsigned int irq)
-void hd_handler(unsigned int irq, pt_regs_t * regs, void *dev_id)
-{
- //printk("\nhd_handler:%d\n", irq);
- unsigned int v = inw(iobase+2);
- printk("[%04x]", v);
-}
-
-int hd_controller_ready(Dev dev)
-{
- int retries = 0x1000;
-
- do
- {
- if(hd_rdy(dev))
- return 1;
- }while(--retries);
-
- return 0;
-}
-
-void hd_controller_reset(unsigned int dev)
-{
- outb_p(HD_CTL_RESET, REG_CTL(dev));
- outb_p(0, REG_CTL(dev));
- while(hd_bsy(dev))
- {
- //printk("bsy");
- }
-}
-
-void hd_out(Dev dev, u32 nsect, u64 sect_nr, u32 cmd)
-{
-
- {
- unsigned long long sect_nr = 0;
- unsigned int nsect = 1;
-
- cli();
- outb_p(0x00, REG_CTL(dev));
-
- outb(0, REG_NSECTOR(dev)); // High
- outb((u8)nsect, REG_NSECTOR(dev)); // Low
-
- outb((u8)((sect_nr>>24)&0xFF), REG_LBAL(dev));
- outb((u8)((sect_nr>> 0)&0xFF), REG_LBAL(dev));
-
- outb((u8)((sect_nr>>32)&0xFF), REG_LBAM(dev));
- outb((u8)((sect_nr>> 8)&0xFF), REG_LBAM(dev));
-
- outb((u8)((sect_nr>>40)&0xFF), REG_LBAH(dev));
- outb((u8)((sect_nr>>16)&0xFF), REG_LBAH(dev));
-
- outb(0xE0, REG_DEVSEL(dev));
- outb(0x24, REG_CMD(dev));
- sti();
- outl(4, iobase);
- return ;
- }
-}
-
-void _hd_read(Dev dev, u64 sect_nr, void *buf, u32 count, u32 cmd)
-{
- u32 device;
- u32 nsect;
- u32 retires = 100;
-
- nsect = (count + SECT_SIZE -1)/SECT_SIZE;
-
- do
- {
- hd_out(dev, nsect, sect_nr, cmd);
-
- int drq_retires = 100000;
- while(!hd_drq(dev) && --drq_retires)
- /* do nothing */;
-
- if(drq_retires != 0)
- break;
- }while(--retires);
-
- if(retires == 0)
- panic("hard disk is not ready");
-
- hd_rd_data(dev, buf, count);
-}
-
-
-void hd_read(Dev dev, u64 sect_nr, void *buf, u32 count)
-{
- _hd_read(dev, sect_nr, buf, count, HD_CMD_READ_EXT);
-}
-
-void hd_read_identify(Dev dev, void *buf)
-{
- _hd_read(dev, 0, buf, SECT_SIZE, HD_CMD_IDENTIFY);
-}
-
-typedef struct _ide_ident {
- u16_t dev_type;
- u8_t _space_[18];
- u8_t serial[34];
- u8_t model[44];
- u8_t capabilites[8];
- u8_t filed_valid[4];
-} ide_ident_t;
-
-void hd_print_identify(const char *buf)
-{
- char *p;
- short *ident;
- int i;
-
- ident = (short *) buf;
-
- char hd_sn[32]; /* 20 bytes */
- char hd_model[64]; /* 40 bytes */
- short hd_capabilites = ident[49];
- short hd_supt_inst_set = ident[83];
-
- p = (char *) (ident+10);
- for(i=0; i<20; i++)
- {
- hd_sn[i] = p[i];
- }
- hd_sn[i] = 0;
-
- p = (char *) (ident+27);
- for(i=0; i<40; i++)
- {
- hd_model[i] = p[i];
- }
- hd_model[i] = 0;
-
-
- printk("Hard Disk Vendor: %s\n", hd_sn);
- printk("Hard Disk Model: %s\n", hd_model);
- printk("Hard Disk Support LBA: %s\n",
- (hd_capabilites & 0x0200) ? "Yes" : "No");
- printk("Hard Disk Support LBA-48bit: %s\n",
- (hd_supt_inst_set & 0x0400) ? "Yes" : "No");
-
- if(!(hd_supt_inst_set & 0x0400))
- panic("Your hard disk ");
-}
-
-typedef struct prd
-{
- unsigned int addr;
- unsigned int cnt : 16;
- unsigned int reserved : 15;
- unsigned int eot : 1;
-} prd_t;
-
-#define PRD_CNT 1
-prd_t hd_prd_tbl[PRD_CNT] __attribute__((aligned(64*1024)));
-
-void dump()
-{
- unsigned char *p = (unsigned char *) hd_prd_tbl[0].addr;
- int i;
- for(i=510; i<512; ++i)
- printk("[%02x] ", p[i]);
-}
-
-
-void hd_pci_init(pci_device_t *pci)
-{
- unsigned int v;
- unsigned int progif;
- v = pci_read_config_word(pci_cmd(pci, PCI_COMMAND));
- printk(" ide pci command %04x\n", v);
- v = pci_read_config_byte(pci_cmd(pci, PCI_PROGIF));
- progif = v & 0xFF;
- printk(" ide pci program interface %02x\n", v);
- v = pci_read_config_long(pci_cmd(pci, PCI_BAR4));
- printk(" ide pci Base IO Address Register %08x\n", v);
- iobase = v & 0xFFF0;
-
- pci_write_config_word(2, pci_cmd(pci, PCI_COMMAND));
-
- v = inw(iobase+0);
- printk(" ide bus master ide command register primary %04x\n", v);
- v = inw(iobase+2);
- printk(" ide bus master ide status register primary %04x\n", v);
-
-
- prd_t *p = (prd_t *) va2pa(hd_prd_tbl);
- printk("hd_prd_tbl %08x physical %08x sizeof prd %d\n", hd_prd_tbl, p, sizeof(prd_t));
- p->addr = 0;
- p->cnt = 512;
- p->reserved = 0;
- p->eot = 1;
-
-
- outl(p, iobase+4);
- outl(32, iobase+2);
- v = inw(iobase+2);
- printk(" ide bus master ide status register primary %04x\n", v);
-
-
- pci_write_config_byte(0xFE, pci_cmd(pci, PCI_INTRLINE));
- v = pci_read_config_byte(pci_cmd(pci, PCI_INTRLINE));
- printk("---- %x\n", v);
- if((v & 0xFF) == 0xFE) {
- printk("This Device needs IRQ assignment.\n");
- } else {
- if(progif == 0x8A || progif == 0x80) {
- printk("This is a Parallel IDE Controller which use IRQ 14 and IRQ 15.\n");
- }
- }
-
- pci_write_config_byte(14, pci_cmd(pci, PCI_INTRLINE));
- v = pci_read_config_byte(pci_cmd(pci, PCI_INTRLINE));
- printk("---- %x\n", v);
-}
-
-/*
- * Bus Master IDE Status Register
- * Bit2 Bit0
- * 0 0 Error Condition
- * 0 1 DMA transfer is in progress
- * 1 0 The IDE device generated an interrupt and the Physical Region Descriptors exhausted
- * 1 1 The IDE device generated an interrupt
- */
-
-void setup_hd()
-{
-#if 1
- pci_device_t *pci = pci_find_device(PCI_VENDORID_INTEL, 0x2850);
- if(pci == 0)
- pci = pci_find_device(PCI_VENDORID_INTEL, 0x7010); // qemu
-
-#else
- pci_device_t *pci = pci_find_device(PCI_VENDORID_INTEL, 0x2922);
-#endif
-
- if(pci == 0)
- panic("can not find ide device");
-
- printk("found ide pci device\n");
-
- hd_pci_init(pci);
-
- hd_controller_reset(ROOT_DEV);
-
- return ;
-
- char *buf;
- buf = (unsigned char *) alloc_one_page(0);
- assert(buf != NULL);
-
- hd_read_identify(ROOT_DEV, buf);
-
- hd_print_identify(buf);
-
- free_pages((unsigned long)buf);
-}
+++ /dev/null
-/*
- *--------------------------------------------------------------------------
- * File Name: hd.h
- *
- * Description: none
- *
- *
- * Author: Zhao Yanbai [zhaoyanbai@126.com]
- *
- * Version: 1.0
- * Create Date: Tue Feb 10 15:17:57 2009
- * Last Update: Mon Feb 01 21:07:31 2010
- *
- *--------------------------------------------------------------------------
- */
-
-#ifndef _HD_H
-#define _HD_H
-
-#include <types.h>
-#include <printk.h>
-#include <assert.h>
-
-/* hard disk command base register */
-#define HD_CHL0_CMD_BASE 0x1F0
-#define HD_CHL1_CMD_BASE 0x170
-
-#define HD_DATA 0
-#define HD_FEATURES 1
-#define HD_ERR 1
-#define HD_ERR_BB 0x80
-#define HD_ERR_ECC 0x40
-#define HD_ERR_ID 0x10
-#define HD_ERR_AC 0x04
-#define HD_ERR_TK 0x02
-#define HD_ERR_DM 0x01
-#define HD_NSECTOR 2
-#define HD_LBAL 3
-#define HD_LBAM 4
-#define HD_LBAH 5
-#define HD_DEVSEL 6
-#define HD_CMD 7
-#define HD_STATUS 7 /* controller status */
-#define HD_STATUS_BSY 0x80 /* controller busy */
-#define HD_STATUS_RDY 0x40 /* drive ready */
-#define HD_STATUS_WF 0x20 /* write fault */
-#define HD_STATUS_SEEK_CMPT 0x10 /* seek complete */
-#define HD_STATUS_DRQ 0x08 /* data transfer request */
-#define HD_STATUS_CRD 0x04 /* correct data */
-#define HD_STATUS_IDX 0x02 /* index pulse */
-#define HD_STATUS_ERR 0x01 /* error */
-#define HD_CMD_IDLE 0x00
-#define HD_CMD_RECALIBRATE 0x10
-#define HD_CMD_READ 0x20 /* read data */
-#define HD_CMD_READ_EXT 0x24 /* read data (LBA-48 bit)*/
-#define HD_CMD_READ_DMA 0x25 /* read data DMA LBA48 */
-#define HD_CMD_WRITE 0x30
-#define HD_CMD_WRITE_EXT 0x34
-#define HD_CMD_READ_VERIFY 0x40
-#define HD_CMD_FORMAT 0x50
-#define HD_CMD_SEEK 0x70
-#define HD_CMD_DIAG 0x90
-#define HD_CMD_SPECIFY 0x91
-#define HD_CMD_IDENTIFY 0xEC
-
-/* hard disk control register */
-#define HD_CHL0_CTL_BASE 0x3F6
-#define HD_CHL1_CTL_BASE 0x376
-
-
-#define HD_CTL 0
-#define HD_CTL_NORETRY 0x80 /* disable access retry */
-#define HD_CTL_NOECC 0x40 /* disable ecc retry */
-#define HD_CTL_EIGHTHEADS 0x08 /* more than 8 heads */
-#define HD_CTL_RESET 0x04 /* reset controller */
-#define HD_CTL_DISABLE_INT 0x02 /* disable interrupts */
-
-#define HD_GET_CHL(dev) (0) /* only support channel 0 */
-#define HD_GET_DEV(dev) (0) /* only support one hard disk */
-
-#define REG_CMD_BASE(dev, offset) ( HD_GET_CHL(dev) ? (HD_CHL1_CMD_BASE+offset) : (HD_CHL0_CMD_BASE+offset) )
-#define REG_CTL_BASE(dev, offset) ( HD_GET_CHL(dev) ? (HD_CHL1_CTL_BASE+offset) : (HD_CHL0_CTL_BASE+offset) )
-
-#define REG_DATA(dev) REG_CMD_BASE(dev, HD_DATA)
-#define REG_ERR(dev) REG_CMD_BASE(dev, HD_ERR)
-#define REG_NSECTOR(dev) REG_CMD_BASE(dev, HD_NSECTOR)
-#define REG_LBAL(dev) REG_CMD_BASE(dev, HD_LBAL)
-#define REG_LBAM(dev) REG_CMD_BASE(dev, HD_LBAM)
-#define REG_LBAH(dev) REG_CMD_BASE(dev, HD_LBAH)
-#define REG_DEVSEL(dev) REG_CMD_BASE(dev, HD_DEVSEL)
-#define REG_STATUS(dev) REG_CMD_BASE(dev, HD_STATUS)
-#define REG_FEATURES(dev) REG_CMD_BASE(dev, HD_FEATURES)
-#define REG_CMD(dev) REG_CMD_BASE(dev, HD_CMD)
-#define REG_CTL(dev) REG_CTL_BASE(dev, HD_CTL)
-
-#define SECT_SIZE 512
-
-
-static inline void hd_rd_port(int port, void *buf, unsigned long count)
-{
- unsigned char *p =(unsigned char *)buf;
- unsigned char value[4];
- int i, n;
- n = (count & 3UL);
- if(n == 0)
- {
- insl(port, p, count>>2);
- }
- else
- {
- insl(port, p, (count>>2));
- insl(port, value, 1);
-
- count -= n;
- for(i=0; i<n; i++)
- p[count+i] = value[i];
- }
-}
-
-#define hd_rd_data(dev, buf, count) hd_rd_port(REG_DATA(dev), buf, count)
-
-#define hd_bsy(dev) ((inb(REG_STATUS(dev)) & HD_STATUS_BSY))
-#define hd_rdy(dev) ((inb(REG_STATUS(dev)) & HD_STATUS_RDY))
-#define hd_drq(dev) ((inb(REG_STATUS(dev)) & HD_STATUS_DRQ))
-#define hd_err(dev) ((inb(REG_STATUS(dev)) & HD_STATUS_ERR))
-
-#endif //_HD_H
ide_cmd_out(0, nsect, sect_nr, HD_CMD_READ_EXT);
- printk("ide_debug\n");
+ //printk("ide_debug\n");
}
DECLARE_MUTEX(mutex);
}
}
+char buf[1024];
void ide_irq()
{
u8_t status = inb(REG_STATUS(0));
- char buf[1024];
- memset(buf, 0xEE, 1024);
+ //memset(buf, 0xEE, 1024);
status = inb(drv.iobase+PCI_IDE_STATUS);
if(0 == (status & PCI_IDE_STATUS_INTR))
outb(status, drv.iobase+PCI_IDE_STATUS);
outb(0x00, drv.iobase+PCI_IDE_CMD);
- insl(REG_DATA(0), buf, 512>>2);
- u16_t *s = (u16_t *) (buf+510);
- printk("hard disk data %04x\n", *s);
- up(&mutex);
+ //insl(REG_DATA(0), buf, (512>>2));
+ int i;
+ unsigned short sig;
+ for(i=0; i<256; ++i)
+ sig = inw(REG_DATA(0));
+ //u16_t *s = (u16_t *) (buf+510);
+ //printd(11, "hard disk data %04x\n", sig);
+ //up(&mutex);
}
if(retires == 0)
panic("hard disk is not ready");
- char buf[1024];
+ //char buf[1024];
insl(REG_DATA(0), buf, 512>>2);
print_ide_identify(buf);
}
void ide_init()
{
- //ide_read_identify();
init_pci_controller(PCI_VENDORID_INTEL, 0x2829);
init_pci_controller(PCI_VENDORID_INTEL, 0x7010);
+ ide_read_identify();
+ printd(6, "BUFF ADDR %08x", buf);
}
+++ /dev/null
-/*
- * ------------------------------------------------------------------------
- * File Name: ide.c
- * Author: Zhao Yanbai
- * Sat May 24 16:30:38 2014
- * Description: none
- * ------------------------------------------------------------------------
- */
-
-#include <types.h>
-#include <printk.h>
-#include <assert.h>
-#include <io.h>
-#include <ide.h>
-#include <irq.h>
-#include <pci.h>
-#include <system.h>
-
-unsigned int HD_CHL0_CMD_BASE = 0x1F0;
-unsigned int HD_CHL1_CMD_BASE = 0x170;
-
-
-unsigned int HD_CHL0_CTL_BASE = 0x3F6;
-unsigned int HD_CHL1_CTL_BASE = 0x376;
-
-typedef struct _hd_drv
-{
- pci_device_t *pci;
- u32_t iobase;
-} hd_drive_t;
-
-hd_drive_t hdrv;
-
-unsigned int iobase;
-typedef struct prd
-{
- unsigned int addr;
- unsigned int cnt : 16;
- unsigned int reserved : 15;
- unsigned int eot : 1;
-} prd_t;
-
-#define PRD_CNT 1
-#define USE_DMA 0
-prd_t hd_prd_tbl[PRD_CNT] __attribute__((aligned(64*1024)));
-unsigned long prdt_phys = 0;
-void ide_pci_init(pci_device_t *pci)
-{
- unsigned int v;
- unsigned int progif;
- v = pci_read_config_word(pci_cmd(pci, PCI_COMMAND));
- printk(" ide pci command %04x\n", v);
- v = pci_read_config_byte(pci_cmd(pci, PCI_PROGIF));
- progif = v & 0xFF;
- printk(" ide pci program interface %02x\n", v);
- v = pci_read_config_long(pci_cmd(pci, PCI_BAR4));
- printk(" ide pci Base IO Address Register %08x\n", v);
- iobase = v & 0xFFFC;
-
- outb(0x20, iobase+2);
-
-#if 1 //USE_DMA
- v = inb(iobase+0);
- printk(" ide bus master ide command register primary %04x\n", v);
- v = inb(iobase+2);
- printk(" ide bus master ide status register primary %04x\n", v);
-#endif
-
- int i;
- printk(" BARS: ");
- for(i=0; i<6; ++i)
- {
- printk("%08x ", pci->bars[i]);
- pci->bars[i] &= (~1UL);
- }
- printk("\n");
-
-#if 1 // USE_DMA
- prd_t *p = (prd_t *) hd_prd_tbl;
- printk("iobase %04x hd_prd_tbl %08x physical %08x sizeof prd %d\n", iobase, hd_prd_tbl, p, sizeof(prd_t));
- unsigned long addr = alloc_one_page(0);
- p->addr = va2pa(addr);
- printk("ADDR %08x %08x %08x\n", addr, p->addr, va2pa(addr));
- p->cnt = 512;
- p->reserved = 0;
- p->eot = 1;
- prdt_phys = (unsigned long) va2pa(p);
- printk(" ide bus master ide status register primary %04x\n", v);
-
- printk("prdt_phys %08x p->addr %08x hd_prd_tbl[0].addr %08x\n", prdt_phys, p->addr, hd_prd_tbl[0].addr);
-#endif
-
- HD_CHL0_CMD_BASE = pci->bars[0] ? pci->bars[0] : HD_CHL0_CMD_BASE;
- HD_CHL0_CTL_BASE = pci->bars[1] ? pci->bars[1] : HD_CHL0_CTL_BASE;
-
- HD_CHL1_CMD_BASE = pci->bars[2] ? pci->bars[2] : HD_CHL1_CMD_BASE;
- HD_CHL1_CTL_BASE = pci->bars[3] ? pci->bars[3] : HD_CHL1_CTL_BASE;
-
- printk("channel0: cmd %04x ctl %04x channel1: cmd %04x ctl %04x\n", HD_CHL0_CMD_BASE, HD_CHL0_CTL_BASE, HD_CHL1_CMD_BASE, HD_CHL1_CTL_BASE);
-}
-
-void ide_hd_out(Dev dev, u32 nsect, u64 sect_nr, u32 cmd)
-{
-#if USE_DMA
- outb(0x00, iobase);
- outb(0x06, iobase+2);
- outl(prdt_phys, iobase+4);
-#endif
-
- {
- unsigned long long sect_nr = 0;
- unsigned int nsect = 1;
-
- outb(0x00, REG_CTL(dev));
- outb(0x40, REG_DEVSEL(dev));
-
- outb(0, REG_NSECTOR(dev)); // High
- outb((u8)((sect_nr>>24)&0xFF), REG_LBAL(dev));
- outb((u8)((sect_nr>>32)&0xFF), REG_LBAM(dev));
- outb((u8)((sect_nr>>40)&0xFF), REG_LBAH(dev));
-
- outb((u8)nsect, REG_NSECTOR(dev)); // Low
- outb((u8)((sect_nr>> 0)&0xFF), REG_LBAL(dev));
- outb((u8)((sect_nr>> 8)&0xFF), REG_LBAM(dev));
- outb((u8)((sect_nr>>16)&0xFF), REG_LBAH(dev));
-
-#if USE_DMA
- outb(0x25, REG_CMD(dev));
-#else
- outb(0x24, REG_CMD(dev));
-#endif
- }
-
-#if USE_DMA
- outb(0x09, iobase);
-#endif
-}
-
-
-void dump_pci_ide();
-
-void ide_status()
-{
- u8_t idest = inb(REG_STATUS(0));
- u8_t pcist = inb(iobase+2);
- printk(" ide status %02x pci status %02x\n", idest, pcist);
-
-}
-void ide_debug()
-{
- u32 device;
- u32 nsect = 1;
- u32 retires = 100;
- u32 sect_nr = 1;
- int count=SECT_SIZE;
-
- nsect = (count + SECT_SIZE -1)/SECT_SIZE;
-
- dump_pci_ide();
-
- ide_hd_out(0, nsect, sect_nr, HD_CMD_READ_DMA);
-
- printk("ide_debug\n");
-}
-
-void dump_pci_controller(unsigned int vendor, unsigned int device)
-{
- pci_device_t *pci = pci_find_device(vendor, device);
- if(pci != 0)
- {
- printk("Found PCI Vendor %04x Device %04x Class %04x IntrLine %d\n", vendor, device, pci->classcode, pci->intr_line);
- ide_pci_init(pci);
- hdrv.pci = pci;
- }
-}
-
-void dump_pci_ide()
-{
- dump_pci_controller(PCI_VENDORID_INTEL, 0x2829);
- dump_pci_controller(PCI_VENDORID_INTEL, 0x7010);
-}
-
-void ide_irq()
-{
- u8_t sa = inb(REG_STATUS(0));
-
- char buf[1024];
- memset(buf, 0xEE, 1024);
-
- u8_t v = inb(iobase+2);
- printk(" irq pci ide status register primary %02x\n", v);
- v |= 0x04;
- printk(" irq pci ide status before write %02x\n", v);
- outb(v, iobase+2);
- v = inb(iobase+2);
- printk(" irq pci ide status after write %02x\n", v);
- outb(0x00, iobase);
-
- unsigned int *p = (unsigned int *) pa2va((0+510));
- printk("||----------------- %s:%d status %04x SIG: %08x\n", __func__, __LINE__, sa, *p);
-
- insw(REG_DATA(0), buf, 512>>1);
- unsigned int *s = (unsigned int *) (buf+510);
- printk("insw %08x\n", *s);
-}
-
-void ide_init()
-{
- pci_device_t *pci = 0;
- dump_pci_ide();
-
-#if 0
- outb_p(0x02, REG_CTL(0));
- ide_read_identify();
-#endif
-
-}
if(scan_code == 0x01) // Esc
reboot();
- printk("[%02x]", scan_code);
+ //printk("[%02x]", scan_code);
if(scan_code == 0x13) // r
ide_debug();
if(scan_code == 0x3E) // F4
debug_wait_queue_put(2);
+#if 0
+ printd(10, "CNSL HEAD : %d", cnsl_rd_q.head);
if((cnsl_rd_q.head+1) == cnsl_rd_q.tail)
goto end;
end:
wake_up(&cnsl_rd_q.wait);
+#endif
}
int sysc_read_kbd()
unsigned int ext2_start_sect;
Inode ext2_root_inode;
-void hd_read(Dev dev, u64 sect_nr, void *buf, u32 count);// { /*TODO*/ }
+void hd_read(Dev dev, u64 sect_nr, void *buf, u32 count) { /*TODO*/ }
void ext2_read_block(int block_id, char *buf);
static void ext2_print_group_descriptor(pGroupDesc p);
static void ext2_print_inode(pInode p);
{
jiffies++;
- printk("^");
- printd(0, "clock: %d", jiffies);
+ //printk("^");
+ //printd(0, "clock: %d", jiffies);
}
tsk->weight= TASK_INIT_WEIGHT;
INIT_LIST_HEAD(&tsk->list);
- // TODO Lock
+
+ unsigned long iflags;
+ irq_save(iflags);
list_add(&tsk->list, &root_task.list);
+ irq_restore(iflags);
return (int)tsk->pid;
}
debug_sem();
printk("---END----%d\n", id);
}
- printd(id+1, "task:%d cnt:%d", id, i);
+ printd(id+1, "task:%d [%08x] cnt:%d preempt_cnt %d", id, current, i, current->preempt_cnt);
int v = debug_wait_queue_get();
printk("task:%d wait queue get %d\n", id, v);
//asm("sti;");
int cnt;
while(1)
{
- printd(1, "root_task cnt %d", cnt++);
+ printd(1, "root_task [%08x] cnt %d preempt_cnt %08x", current, cnt++, root_task.preempt_cnt);
+ printd(9, "pid %d ppid %08x state %08x weight %08x",
+ root_task.pid, root_task.ppid, root_task.state, root_task.weight);
asm("sti;hlt;");
//sysc_test();
//syscall0(SYSC_TEST);
asm("movl %%cr2,%%eax":"=a"(addr));
-/*
- unsigned long cr3;
- asm("movl %%cr3,%%eax":"=a"(cr3));
- printk("%08x errcode: %08x cr2: %08x cr3: %08x\n",
- current, errcode, addr, cr3);
-*/
-
unsigned long a = (unsigned long) addr;
a = 0;
if((errcode & PAGE_P) == 0)
{
- extern void do_no_page(void *);
+ extern void do_no_page(void *);
do_no_page(addr);
}
else
{
- extern void do_wp_page(void *);
+ extern void do_wp_page(void *);
do_wp_page(addr);
}
}
testl $0x0003, %eax
jz resume_kernel
+return:
+ cmpl $0, TI_preempt_cnt(%ebp)
+ jnz restore_regs
+
resched:
- call schedule
+ #call schedule
restore_regs:
iret
resume_kernel:
- cmpl $0, TI_preempt_cnt(%ebp)
- jz resched
- jmp restore_regs
+ # ...
+ jmp return
#include <errno.h>
#include <assert.h>
#include <task.h>
+#include <atomic.h>
irq_desc_t irq_desc[NR_IRQS];
.depth = 0
};
+static int preempt = 0;
+
__attribute__ ((regparm(1))) void irq_handler(pt_regs_t *regs)
{
-
unsigned int irq = regs->irq;
if(irq >= NR_IRQS)
irq_action_t *action = p->action;
- current->preempt_cnt++;
+ //atomic_inc(&(current->preempt_cnt));
+ atomic_inc(&preempt);
+
+ unsigned long esp;
+ printd(8, "preempt : %d", preempt);
+ //asm("movl %%esp, %%eax":"=a"(esp));
+ //printd(8, "preempt_cnt:%d current %08x esp %08x", current->preempt_cnt, current, esp);
+ //printk("preempt_cnt:%d current %08x esp %08x\n", current->preempt_cnt, current, esp);
+
+#if 0
+ esp >>= 16;
+ if(esp != 0xC013 && esp != 0xC7FF)
+ {
+ asm("cli");
+ printk("FUCK\n");
+ while(1);
+ }
+#endif
p->chip->ack(irq);
sti();
action->handler(irq, regs, action->dev_id);
action = action->next;
}
-
cli();
p->chip->enable(irq);
- current->preempt_cnt--;
+ atomic_dec(&preempt);
+ //atomic_dec(&(current->preempt_cnt));
}
-int request_irq( unsigned int irq,
- void (*handler)(unsigned int, pt_regs_t *, void *),
- const char *devname,
- void *dev_id)
+int request_irq(unsigned int irq,
+ void (*handler)(unsigned int, pt_regs_t *, void *),
+ const char *devname,
+ void *dev_id)
{
irq_action_t * p;
extern void vga_puts(const char *buf, unsigned char color);
extern void vga_dbg_puts(unsigned long line, const char *buf, unsigned char color);
+char pkbuf[1024];
int printk(const char *fmtstr, ...)
{
- char pkbuf[1024];
char *args = (char*)(((char*)&fmtstr)+4);
vsprintf(pkbuf, fmtstr, args);
vga_puts(pkbuf,0x2);
return 0;
}
+char pdbuf[1024];
int printd(unsigned int line, const char *fmtstr, ...)
{
- char pkbuf[1024];
char *args = (char*)(((char*)&fmtstr)+4);
- vsprintf(pkbuf, fmtstr, args);
- vga_dbg_puts(line, pkbuf,0x2);
+ vsprintf(pdbuf, fmtstr, args);
+ vga_dbg_puts(line, pdbuf,0x7);
return 0;
}
root_task.preempt_cnt = 0;
root_task.pid = get_next_pid();
- root_task.ppid = 0;
- root_task.state = TASK_RUNNING;
- root_task.weight = TASK_INIT_WEIGHT;
+ root_task.ppid = 1000;
+ root_task.state = 2000;//TASK_RUNNING;
+ root_task.weight = 3000;//TASK_INIT_WEIGHT;
INIT_LIST_HEAD(&root_task.list);
for(i=0; i<NR_OPENS; i++)
inline void switch_to()
{
- load_cr3(current);
+ LOAD_CR3(current->cr3);
set_esp0(current);
}
"1:"
"popl %%ebp;"
"popfl;"
- : [prev_esp] "=m" (prev->esp),
- [prev_eip] "=m" (prev->eip),
- "=a" (prev), "=b" (ebx), "=c" (ecx),
- "=d" (edx), "=S" (esi), "=D" (edi)
- : [next_esp] "m" (next->esp),
- [next_eip] "m" (next->eip),
+ : [prev_esp] "=m" (prev->esp),
+ [prev_eip] "=m" (prev->eip),
+ "=a" (prev),"=b" (ebx), "=c" (ecx),
+ "=d" (edx), "=S" (esi), "=D" (edi)
+ : [next_esp] "m"(next->esp),
+ [next_eip] "m"(next->eip),
[prev] "a" (prev),
[next] "d" (next)
: "memory"
{
task_union *sel = &root_task;
task_union *p = 0;
- list_head_t *pos = 0;
+ list_head_t *pos = 0, *t=0;
unsigned int max_weight = 0;
- list_for_each(pos, &root_task.list)
+ unsigned long iflags;
+ irq_save(iflags);
+ list_for_each_safe(pos, t, &root_task.list)
{
p = list_entry(pos, task_union, list);
p->weight = TASK_INIT_WEIGHT;
}
}
+ irq_restore(iflags);
sel->weight--;
task_union *next = sel;
if(prev != sel)
+ {
+ //unsigned long flags;
+ //irq_save(flags);
+ //LOAD_CR3(root_task.cr3);
context_switch(prev, next);
+ //irq_restore(flags);
+ }
}
void debug_sched()
unsigned int debug_global_var = 0;
int debug_wait_queue_get()
{
+ return 0;
unsigned int v = 0;
task_union * task = current;
DECLARE_WAIT_QUEUE(wait, task);