#define _CPUF_I386_PGE 2 /* Page Global Enable */
#define _CPUF_I386_APIC_ON_CHIP 3 /* APIC is present on the chip */
#define _CPUF_I386_TSC 4 /* Timestamp counter present */
-#define _CPUF_I386_SSEx 5 /* Support for SSE/SSE2/SSE3/SSSE3/SSE4 Extensions and FXSR */
+#define _CPUF_I386_SSEx 5 /* Support for SSE/SSE2/SSE3/SSSE3/SSE4
+ * Extensions and FXSR
+ */
#define _CPUF_I386_FXSR 6
#define _CPUF_I386_SSE 7
#define _CPUF_I386_SSE2 8
#endif /* _MINIX_CHIP == _CHIP_INTEL */
struct sigcontext {
- int sc_flags; /* sigstack state to restore (including MF_FPU_INITIALIZED) */
+ int sc_flags; /* sigstack state to restore (including
+ * MF_FPU_INITIALIZED)
+ */
long sc_mask; /* signal mask to restore */
sigregs sc_regs; /* register set to restore */
#if (_MINIX_CHIP == _CHIP_INTEL)
- union fpu_state_u fpu_state;
+ union fpu_state_u sc_fpu_state;
#endif
};
osfxsr_feature = 1;
for (rp = BEG_PROC_ADDR; rp < END_PROC_ADDR; ++rp) {
- /* FXSR requires 16-byte alignment of memory image,
- * but unfortunately some old tools (probably linker)
- * ignores ".balign 16" applied to our memory image.
+ /* FXSR requires 16-byte alignment of memory
+ * image, but unfortunately some old tools
+ * (probably linker) ignores ".balign 16"
+ * applied to our memory image.
* Thus we have to do manual alignment.
*/
- aligned_fp_area = (phys_bytes) &rp->fpu_state.fpu_image;
+ aligned_fp_area =
+ (phys_bytes) &rp->p_fpu_state.fpu_image;
if(aligned_fp_area % FPUALIGN) {
aligned_fp_area += FPUALIGN -
(aligned_fp_area % FPUALIGN);
}
- rp->fpu_state.fpu_save_area_p =
+ rp->p_fpu_state.fpu_save_area_p =
(void *) aligned_fp_area;
}
} else {
struct proc {
struct stackframe_s p_reg; /* process' registers saved in stack frame */
- struct fpu_state_s fpu_state; /* process' fpu_regs saved lazily */
+ struct fpu_state_s p_fpu_state; /* process' fpu_regs saved lazily */
struct segframe p_seg; /* segment descriptors */
proc_nr_t p_nr; /* number of this process (for fast access) */
struct priv *p_priv; /* system privileges structure */
#include "../system.h"
#include "../vm.h"
#include <signal.h>
+#include <string.h>
#include <minix/endpoint.h>
gen = _ENDPOINT_G(rpc->p_endpoint);
#if (_MINIX_CHIP == _CHIP_INTEL)
old_ldt_sel = rpc->p_seg.p_ldt_sel; /* backup local descriptors */
- old_fpu_save_area_p = rpc->fpu_state.fpu_save_area_p;
+ old_fpu_save_area_p = rpc->p_fpu_state.fpu_save_area_p;
#endif
*rpc = *rpp; /* copy 'proc' struct */
#if (_MINIX_CHIP == _CHIP_INTEL)
rpc->p_seg.p_ldt_sel = old_ldt_sel; /* restore descriptors */
- rpc->fpu_state.fpu_save_area_p = old_fpu_save_area_p;
+ rpc->p_fpu_state.fpu_save_area_p = old_fpu_save_area_p;
if(rpp->p_misc_flags & MF_FPU_INITIALIZED)
- memcpy(rpc->fpu_state.fpu_save_area_p,
- rpp->fpu_state.fpu_save_area_p,
+ memcpy(rpc->p_fpu_state.fpu_save_area_p,
+ rpp->p_fpu_state.fpu_save_area_p,
FPU_XFP_SIZE);
#endif
if(++gen >= _ENDPOINT_MAX_GENERATION) /* increase generation */
#if (_MINIX_CHIP == _CHIP_INTEL)
if(sc.sc_flags & MF_FPU_INITIALIZED)
{
- memcpy(rp->fpu_state.fpu_save_area_p, &sc.fpu_state, FPU_XFP_SIZE);
+ memcpy(rp->p_fpu_state.fpu_save_area_p, &sc.sc_fpu_state,
+ FPU_XFP_SIZE);
rp->p_misc_flags |= MF_FPU_INITIALIZED; /* Restore math usage flag. */
}
#endif
memcpy(&sc.sc_regs, (char *) &rp->p_reg, sizeof(sigregs));
#if (_MINIX_CHIP == _CHIP_INTEL)
if(rp->p_misc_flags & MF_FPU_INITIALIZED)
- memcpy(&sc.fpu_state, rp->fpu_state.fpu_save_area_p, FPU_XFP_SIZE);
+ memcpy(&sc.sc_fpu_state, rp->p_fpu_state.fpu_save_area_p,
+ FPU_XFP_SIZE);
#endif
/* Finish the sigcontext initialization. */
#if (_MINIX_CHIP == _CHIP_INTEL)
if (osfxsr_feature == 1) {
- fp_error = sc.fpu_state.xfp_regs.fp_status &
- ~sc.fpu_state.xfp_regs.fp_control;
+ fp_error = sc.sc_fpu_state.xfp_regs.fp_status &
+ ~sc.sc_fpu_state.xfp_regs.fp_control;
} else {
- fp_error = sc.fpu_state.fpu_regs.fp_status &
- ~sc.fpu_state.fpu_regs.fp_control;
+ fp_error = sc.sc_fpu_state.fpu_regs.fp_status &
+ ~sc.sc_fpu_state.fpu_regs.fp_control;
}
if (fp_error & 0x001) { /* Invalid op */