/* Wait until FIFO's empty */
for (i = 0; i < 100000; i++)
- if (mmio_read(OMAP3_UART3_LSR) & OMAP3_LSR_TX_FIFO_E)
+ if (mmio_read(OMAP3_UART3_LSR) & OMAP3_LSR_THRE)
break;
/* Write character */
mmio_write(OMAP3_UART3_THR, c);
+
+ /* And wait again until FIFO's empty to prevent TTY from overwriting */
+ for (i = 0; i < 100000; i++)
+ if (mmio_read(OMAP3_UART3_LSR) & (OMAP3_LSR_THRE | OMAP3_LSR_TEMT))
+ break;
}
#define OMAP3_SSR 0x044 /* Supplementary status register */
/* Line status register fields */
-#define OMAP3_LSR_TX_FIFO_E (1 << 5) /* Transmit FIFO empty */
+#define OMAP3_LSR_TEMT 0x40 /* Transmitter empty */
+#define OMAP3_LSR_THRE 0x20 /* Transmit-hold-register empty */
/* Supplementary status register fields */
#define OMAP3_SSR_TX_FIFO_FULL (1 << 0) /* Transmit FIFO full */