*build*
*.BIN
*.map
+*.diff
bin/hw
bin/sh
I can't find a satisfactory name for my kernel.
### HOW TO GET THE LATEST SOURCECODE?
- git clone https://github.com/acevest/kernel
+ git clone https://github.com/acevest/kernel.git
### WHEN DID YOU START TO DO THIS WORK?
Maybe 2006.12
### HOW TO COMPILE THIS KERNEL?
# Init Page Directory
movl %ebx,%edi
movl $init_pgt-KRNLADDR,%eax
- addl $3,%eax
+ addl $7,%eax
movl $BOOT_INIT_PAGETBL_CNT,%ecx
1:
stosl
movl %eax,%edi
movl $init_pgt-KRNLADDR,%eax
- addl $3,%eax
+ addl $7,%eax
movl $BOOT_INIT_PAGETBL_CNT,%ecx
2:
stosl
movl $init_pgt-KRNLADDR,%ebx
movl %ebx,%edi
movl $(BOOT_INIT_PAGETBL_CNT*1024),%ecx
- movl $3,%eax
+ movl $7,%eax
cld
3:
stosl
*--------------------------------------------------------------------------
*/
-#ifndef _I8259_H
+#ifndef _I8259_H
#define _I8259_H
#include "irq.h"
#include "io.h"
-#define PIC_MASTER_CMD 0x20
-#define PIC_MASTER_IMR 0x21
-#define PIC_SLAVER_CMD 0xA0
-#define PIC_SLAVER_IMR 0xA1
+#define PIC_MASTER_CMD 0x20
+#define PIC_MASTER_IMR 0x21
+#define PIC_SLAVE_CMD 0xA0
+#define PIC_SLAVE_IMR 0xA1
-#define PIC_MASTER_ISR PIC_MASTER_CMD
-#define PIC_SLAVER_ISR PIC_SLAVER_CMD
+#define PIC_MASTER_ISR PIC_MASTER_CMD
+#define PIC_SLAVE_ISR PIC_SLAVE_CMD
-#define PIC_CASCADE_IR 0x2 //The IR2 on Master Connect to Slaver.
+#define PIC_CASCADE_IR 0x2 //The IR2 on Master Connect to Slave.
extern void init_i8259();
extern void mask_i8259();
-static inline int enable_i8259_irq(unsigned int irq)
-{
- unsigned char mask = ~(1 << irq);
- if(irq & 8)
- {
- mask &= inb(PIC_SLAVER_IMR);
- outb( mask, PIC_SLAVER_IMR);
- }
- else
- {
- mask &= inb(PIC_MASTER_IMR);
- outb_p( mask, PIC_MASTER_IMR);
- }
-}
-static inline int disable_i8259_irq(unsigned int irq)
-{
- unsigned char mask = 1 << irq;
- if(irq & 8)
- {
- mask |= inb(PIC_SLAVER_IMR);
- outb( mask, PIC_SLAVER_IMR);
- }
- else
- {
- mask |= inb(PIC_MASTER_IMR);
- outb( mask, PIC_MASTER_IMR);
- }
-}
-
-static inline void mask_ack_i8259_irq(unsigned int irq)
-{
- unsigned int mask = 1 << irq;
-
- if(irq & 8)
- {
- mask |= inb(PIC_SLAVER_IMR);
- // Mask
- outb(mask, PIC_SLAVER_IMR);
- // Specific EOI to slave
- outb(0x60 + (irq & 0x07), PIC_SLAVER_CMD);
- // Specific EOI to master
- outb(0x60 + (PIC_CASCADE_IR & 0x07), PIC_MASTER_CMD);
- }
- else
- {
- mask |= inb(PIC_MASTER_IMR);
- // Mask
- outb(mask, PIC_MASTER_IMR);
- // Specific EOI to master
- outb(0x60 + irq, PIC_MASTER_CMD);
- }
+#if 0
+=Programmable Interrupt Controller=
-/*
- // None Specific EOI
- outb(0x20, PIC_MASTER_CMDA);
- outb(0x20, PIC_SLAVER_CMDA);
-*/
-}
+*Registers:*
+ * Interrupt Mask Register (IMR)
+ The IMR specifies which interrupts are to be ignored and not acknowledged. if set the bit.
+ * Interrupt Request Register (IRR)
+ The IRR specifies which interrupts are pending acknowledgement, and is typically a symbolic register which can not be directly accessed.
+ * In Sevice Register (ISR)
+ The ISR register specifies which interrupts have been acknowledged, but are still waiting for an End Of Interrupt (EOI).
+*Port:*
+ *Master:*
+ * 0x20: W ICW1. W OCW2. W OCW3. R IRR. R ISR.
+ * 0x21: W ICW2. W ICW3. W ICW4. RW ICW3. RW ICW4. RW IMR
+ *Slave:*
+ * 0xA0: W ICW1. W OCW2. W OCW3. R IRR. R ISR.
+ * 0xA1: W ICW2. W ICW3. W ICW4. RW IMR.
+
+*ICW1*
+
+_PORT 0x20 : 0xA0_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | | | +--[1 Need ICW4 : 0 Not]
+ | | | | | | +------[1 Single PIC : 0 Multi]
+ | | | | | +----------[1 4 Bytes Interrupt Vector : 0 8]
+ | | | | +--------------[1 Level Triggered Mode : 0 Edge]
+ | | | +------------------[ 1 == ICW1 ]
+ +---+---+----------------------[ 0 == PC System]
+}}}
+
+*ICW2*
+
+_PORT 0x21 : 0xA1_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | +---+---+--[000 == 80x86 System]
+ +---+---+---+---+--------------[Bit 7..3 80x86 Interrupt Vector]
+}}}
+
+*ICW3 For Master*
+
+_PORT 0x21 : 0xA1_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | | | +--[1 IRQ0 Connect Slave : 0 No]
+ | | | | | | +------[1 IRQ1 Connect Slave : 0 No]
+ | | | | | +----------[1 IRQ2 Connect Slave : 0 No]
+ | | | | +--------------[1 IRQ3 Connect Slave : 0 No]
+ | | | +------------------[1 IRQ4 Connect Slave : 0 No]
+ | | +----------------------[1 IRQ5 Connect Slave : 0 No]
+ | +--------------------------[1 IRQ6 Connect Slave : 0 No]
+ +------------------------------[1 IRQ7 Connect Slave : 0 No]
+}}}
+
+*ICW3 For Slaver*
+
+_PORT 0x21 : 0xA1_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | +---+---+--[The Master IR No. Slaver Connect To]
+ +---+---+---+---+--------------[00000]
+}}}
+
+*ICW4*
+
+_PORT 0x21 : 0xA1_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | | | +--[1 80x86 Mode : 0 MCS 80/85]
+ | | | | | | +------[1 Auto EOI : 0 Normal EOI]
+ | | | | +---+----------[0X Non - Buffered Mode :
+ | | | | 11 Master Buffered Mode : 10 Slave]
+ | | | +------------------[1 Special Fully Nested Mode : 0 Not]
+ +---+---+----------------------[000 Not Used]
+}}}
+
+*OCW1*
+
+_PORT 0x21 : 0xA1_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | | |
+ | | | | | | | +--[0 IRQ0 Open : Close]
+ | | | | | | +------[0 IRQ1 Open : Close]
+ | | | | | +----------[0 IRQ2 Open : Close]
+ | | | | +--------------[0 IRQ3 Open : Close]
+ | | | +------------------[0 IRQ4 Open : Close]
+ | | +----------------------[0 IRQ5 Open : Close]
+ | +--------------------------[0 IRQ6 Open : Close]
+ +------------------------------[0 IRQ7 Open : Close]
+}}}
+*OCW2*
-static inline void do_i8259_IRQ(pPtRegs regs, unsigned int irq)
-{
-}
+_PORT 0x20 : 0xA0_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 |EOI| 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | +---+---+
+ | | | | | | +--[000 Act On IRQ0]
+ | | | | | | |--[001 Act On IRQ1]
+ | | | | | | |--[010 Act On IRQ2]
+ | | | | | |_____ |--[011 Act On IRQ3]
+ | | | | | |--[100 Act On IRQ4]
+ | | | +---+---[00] |--[101 Act On IRQ5]
+ | | | |--[110 Act On IRQ6]
+ +---+---+ +--[111 Act On IRQ7]
+ | +--[000 Rotate In Auto EOI Mode (Clear)]
+ | |--[001 Non Specific EOI]]
+ | |--[010 Reserved]
+ |_______|--[011 Specific EOI]
+ |--[100 Rotate In Auto EOI Mode (Set)]
+ |--[101 Rotate On Non-Specific EOI]
+ |--[110 Set Priority Command (Use Bits 2:0)]
+ +--[111 Rotate On Specific EOI (Use Bits 2:0)]
+}}}
+*OCW3*
+_PORT 0x20 : 0xA0_
+{{{
++---+---+---+---+---+---+---+---+
+| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
++---+---+---+---+---+---+---+---+
+ | | | | | | +---+
+ | | | | | | | +--[00 Reserved]
+ | | | | | | |____|--[01 Reserved]
+ | | | | | | |--[10 Next Read Returns IRR]
+ | | | | | | +--[11 Next Read Returns ISR]
+ | | | | | +-------------[1 Poll Command : 0 No Poll Command]
+ | | | | +-----------------[1]
+ | +---+ +---------------------[0]
+ | | +--[00 Reserved]
+ | |_____|--[01 Reserved]
+ | |--[10 Reset Special Mask]
+ | +--[11 Set Special Mask]
+ +--[0]
+}}}
+#endif
#endif //_I8259_H
*--------------------------------------------------------------------------
*/
-#ifndef _SYSCALL_H
+#ifndef _SYSCALL_H
#define _SYSCALL_H
#define SYSC_NUM 256
#include "page.h"
#include "errno.h"
-typedef int SyscReturn;
-typedef SyscReturn (*pfSysc)();
+int _syscall0(int nr);
+int _syscall1(int nr, unsigned long a);
+int _syscall2(int nr, unsigned long a, unsigned long b);
+int _syscall3(int nr, unsigned long a, unsigned long b, unsigned long c);
+int _syscall4(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d);
+int _syscall5(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d, unsigned long e);
-#define SYSENTER \
- asm( \
- "pushl %ecx;" \
- "pushl %edx;" \
- "pushl %ebp;" \
- "pushl $1f;" \
- "movl %esp,%ebp;" \
- "sysenter;" \
- "1:" \
- "addl $4,%esp;" \
- "popl %ebp;" \
- "popl %edx;" \
- "popl %ecx;"); \
+#define syscall0(nr) _syscall0(nr)
+#define syscall1(nr, a) _syscall1(nr, (unsigned long)a)
+#define syscall2(nr, a, b) _syscall2(nr, (unsigned long)a, (unsigned long)b)
+#define syscall3(nr, a, b, c) _syscall3(nr, (unsigned long)a, (unsigned long)b, (unsigned long)c)
+#define syscall4(nr, a, b, c, d) _syscall4(nr, (unsigned long)a, (unsigned long)b, (unsigned long)c, (unsigned long)d)
+#define syscall5(nr, a, b, c, d, e) _syscall5(nr, (unsigned long)a, (unsigned long)b, (unsigned long)c, (unsigned long)d, (unsigned long)e)
-
-
-#define sysenter(vect)({ \
- asm(""::"a"(vect)); \
- SYSENTER \
-})
-#if 0
-#define syscall0(vect)(({ \
- sysenter(vect); \
-}), ({int i;asm("":"=a"(i));i;}))
-#endif
-#define _syscall0(vect)({ \
- sysenter(vect); \
-})
-
-#define _syscall1(vect, a)({ \
- asm(""::"b"(a)); \
- sysenter(vect); \
-})
-
-#define _syscall2(vect, a, b)({ \
- asm(""::"b"(a), "d"(b));\
- sysenter(vect); \
-})
-
-#define _syscall3(vect, a, b, c)({ \
- asm(""::"b"(a), "d"(b), "c"(c));\
- sysenter(vect); \
-})
-
-#define _syscall_ret()({ \
- int ret; \
- asm("":"=a"(ret)); \
- if(ret < 0) \
- { \
- errno = -ret; \
- ret = -1; \
- } \
- ret;})
-
-#define syscall0(vect) \
- (({_syscall0(vect);}), ({_syscall_ret();}))
-#define syscall1(vect, a) \
- (({_syscall1(vect, a);}), ({_syscall_ret();}))
-#define syscall2(vect, a, b) \
- (({_syscall2(vect, a, b);}), ({_syscall_ret();}))
-#define syscall3(vect, a, b, c) \
- (({_syscall3(vect, a, b, c);}), ({_syscall_ret();}))
-#if 1
enum
{
SYSC_WRITE,
SYSC_READ_KBD,
SYSC_REBOOT,
SYSC_FORK,
+ SYSC_CLONE,
SYSC_EXEC,
SYSC_OPEN,
SYSC_READ,
SYSC_PAUSE,
SYSC_TEST
};
-#endif
#endif // ASM
#include "i8259.h"
#include "irq.h"
-irq_chip_t i8259_chip =
+void mask_i8259()
{
- .name = "XT-PIC",
- .enable = enable_i8259_irq,
- .disable = disable_i8259_irq,
- .ack = mask_ack_i8259_irq,
-};
-#if 0
-void enable_i8259_irq(unsigned int irq)
+ //mask all of 8259
+ outb_p(0xFF, PIC_MASTER_IMR);
+ outb_p(0xFF, PIC_SLAVE_IMR);
+}
+
+void init_i8259()
{
- unsigned int mask = ~(1 << irq);
- cached_irq_mask &= mask;
+ //Master...
+ outb_p(0x11, PIC_MASTER_CMD); // ICW1
+ outb_p(0x20, PIC_MASTER_IMR); // ICW2: IR0-7 mapped to 0x20-0x27
+ outb_p(1U<<PIC_CASCADE_IR, PIC_MASTER_IMR); //IR2 Connect Slave.
+ outb_p(0x01, PIC_MASTER_IMR); // Normal EOI
+ //Auto EOI:outb_p(0x03, PIC_MASTER_CMDB);
+
+ //Slave...
+ outb_p(0x11, PIC_SLAVE_CMD);
+ outb_p(0x28, PIC_SLAVE_IMR); // IR0-7 mapped to 0x28-0x2F
+ outb_p(PIC_CASCADE_IR, PIC_SLAVE_IMR);
+ outb_p(0x01, PIC_SLAVE_IMR);
+ //Auto EOI:outb_p(0x01, PIC_SLAVE_CMDB);
+ mask_i8259();
+}
+
+int enable_i8259_irq(unsigned int irq)
+{
+ unsigned char mask = ~(1 << irq);
if(irq & 8)
- outb_p(cached_slaver_mask, PIC_SLAVER_IMR);
+ {
+ mask &= inb(PIC_SLAVE_IMR);
+ outb( mask, PIC_SLAVE_IMR);
+ }
else
- outb_p(cached_master_mask, PIC_MASTER_IMR);
+ {
+ mask &= inb(PIC_MASTER_IMR);
+ outb_p( mask, PIC_MASTER_IMR);
+ }
}
-void disable_i8259_irq(unsigned int irq)
+int disable_i8259_irq(unsigned int irq)
{
- unsigned int mask = 1 << irq;
- cached_irq_mask |= mask;
+ unsigned char mask = 1 << irq;
if(irq & 8)
- outb_p(cached_slaver_mask, PIC_SLAVER_IMR);
+ {
+ mask |= inb(PIC_SLAVE_IMR);
+ outb( mask, PIC_SLAVE_IMR);
+ }
else
- outb_p(cached_master_mask, PIC_MASTER_IMR);
+ {
+ mask |= inb(PIC_MASTER_IMR);
+ outb( mask, PIC_MASTER_IMR);
+ }
}
-#endif
-void mask_i8259()
+
+void mask_ack_i8259_irq(unsigned int irq)
{
- //mask all of 8259
- outb_p(0xFF, PIC_MASTER_IMR);
- outb_p(0xFF, PIC_SLAVER_IMR);
+ unsigned int mask = 1 << irq;
+
+ if(irq & 8) // Slave
+ {
+ mask |= inb(PIC_SLAVE_IMR);
+ // Mask
+ outb(mask, PIC_SLAVE_IMR);
+ // Specific EOI to slave
+ outb(0x60 + (irq & 0x07), PIC_SLAVE_CMD);
+ // Specific EOI to master
+ outb(0x60 + (PIC_CASCADE_IR & 0x07), PIC_MASTER_CMD);
+ }
+ else // Master
+ {
+ mask |= inb(PIC_MASTER_IMR);
+ // Mask
+ outb(mask, PIC_MASTER_IMR);
+ // Specific EOI to master
+ outb(0x60 + irq, PIC_MASTER_CMD);
+ }
}
-void init_i8259()
-{
-#if 0
- outb_p(0x11,0x20);
- outb_p(0x11,0xA0);
- outb_p(0x20,0x21);
- outb_p(0x28,0xA1);
+irq_chip_t i8259_chip =
+{
+ .name = "XT-PIC",
+ .enable = enable_i8259_irq,
+ .disable = disable_i8259_irq,
+ .ack = mask_ack_i8259_irq,
+};
- outb_p(0x04,0x21);
- outb_p(0x02,0xA1);
+void do_i8259_IRQ(pPtRegs regs, unsigned int irq)
+{
- outb_p(0x01,0x21);
- outb_p(0x01,0xA1);
- outb_p(0xFF,0x21);
- outb_p(0xFF,0xA1);
-#else
- //Master...
- outb_p(0x11, PIC_MASTER_CMD); // ICW1
- outb_p(0x20, PIC_MASTER_IMR); // ICW2: IR0-7 mapped to 0x20-0x27
- outb_p(1U<<PIC_CASCADE_IR, PIC_MASTER_IMR); //IR2 Connect Slaver.
- outb_p(0x01, PIC_MASTER_IMR); // Normal EOI
- //Auto EOI:outb_p(0x03, PIC_MASTER_CMDB);
-
- //Slaver...
- outb_p(0x11, PIC_SLAVER_CMD);
- outb_p(0x28, PIC_SLAVER_IMR); // IR0-7 mapped to 0x28-0x2F
- outb_p(PIC_CASCADE_IR, PIC_SLAVER_IMR);
- outb_p(0x01, PIC_SLAVER_IMR);
- //Auto EOI:outb_p(0x01, PIC_SLAVER_CMDB);
- mask_i8259();
-#endif
}
System system;
static char kernel_stack[KRNL_STACK_SIZE] __attribute__ ((__aligned__(PAGE_SIZE)));
+static char root_task_stack[PAGE_SIZE] __attribute__ ((__aligned__(PAGE_SIZE)));
int KernelEntry()
{
- asm( "movl $kernel_stack,%%esp;"
+ asm("movl $kernel_stack,%%esp;"
"addl %%eax,%%esp;"
::"a"(KRNL_STACK_SIZE));
setup_kernel();
- asm(" movl $0x23,%%eax; \
- movw %%ax,%%ds; \
- movw %%ax,%%es; \
- movw %%ax,%%fs; \
- movw %%ax,%%gs; \
- pushl $0x23; \
- pushl %%ebx; \
- pushl $0x282; \
- pushl $0x1B; \
+ asm("movl $0x23,%%eax; \
+ movw %%ax,%%ds; \
+ movw %%ax,%%es; \
+ movw %%ax,%%fs; \
+ movw %%ax,%%gs; \
+ pushl $0x23; \
+ pushl %%ebx; \
+ pushl $0x282; \
+ pushl $0x1B; \
leal root_task,%%eax; \
- pushl %%eax; \
- iret;"::"b"(KRNLADDR));
+ pushl %%eax; \
+ iret;"::"b"(root_task_stack+PAGE_SIZE));
return 0;
}
#else
void root_task()
{
+ while(1)
+ {
+ //asm("hlt;");
+ }
pid_t pid;
/*
int fd = open("/boot/grub/grub.conf", O_RDONLY);
current, errcode, addr, cr3);
*/
+ unsigned long a = (unsigned long) addr;
+
+ a = 0;
+
if((errcode & PAGE_P) == 0)
{
extern void do_no_page(void *);
.align 0x1000
.global sysexit
sysexit:
- nop
- nop
+ popl %ebp;
+ popl %edx;
+ popl %ecx;
ret
void init_sysc_handler_table()
{
int i;
-
for(i=0; i<SYSC_NUM; i++)
sysc_handler_table[i] = (unsigned long) sysc_none;
return 0;
}
+
+
+
+#define SYSENTER_ASM \
+ "pushl $1f;" \
+ "pushl %%ecx;" \
+ "pushl %%edx;" \
+ "pushl %%ebp;" \
+ "movl %%esp,%%ebp;" \
+ "sysenter;" \
+ "1:"
+
+static int __syscall0(int nr)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr));
+ return __sysc_ret__;
+}
+
+static int __syscall1(int nr, unsigned long a)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr), "b"(a));
+ return __sysc_ret__;
+}
+
+static int __syscall2(int nr, unsigned long a, unsigned long b)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr), "b"(a), "c"(b));
+ return __sysc_ret__;
+}
+
+static int __syscall3(int nr, unsigned long a, unsigned long b, unsigned long c)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr), "b"(a), "c"(b), "d"(c));
+ return __sysc_ret__;
+}
+
+static int __syscall4(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr), "b"(a), "c"(b), "d"(c), "S"(d));
+ return __sysc_ret__;
+}
+
+static int __syscall5(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d, unsigned long e)
+{
+ int __sysc_ret__ = 0;
+ asm(SYSENTER_ASM:"=a"(__sysc_ret__):"a"(nr), "b"(a), "c"(b), "d"(c), "S"(d), "D"(e));
+ return __sysc_ret__;
+}
+
+
+
+int _syscall0(int nr)
+{
+ return __syscall0(nr);
+}
+
+int _syscall1(int nr, unsigned long a)
+{
+ return __syscall1(nr, a);
+}
+
+int _syscall2(int nr, unsigned long a, unsigned long b)
+{
+ return __syscall2(nr, a, b);
+}
+
+int _syscall3(int nr, unsigned long a, unsigned long b, unsigned long c)
+{
+ return __syscall3(nr, a, b, c);
+}
+
+int _syscall4(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return __syscall4(nr, a, b, c, d);
+}
+
+int _syscall5(int nr, unsigned long a, unsigned long b, unsigned long c, unsigned long d, unsigned long e)
+{
+ return __syscall5(nr, a, b, c, d, e);
+}
memset((void *)pgtb_addr, 0, PAGE_SIZE);
- init_pgd[get_npd(page_addr)] = (pde_t)(pgtb_addr | PAGE_P | PAGE_WR);
+ init_pgd[get_npd(page_addr)] = (pde_t)(pgtb_addr | PAGE_P | PAGE_WR | PAGE_US);
}
pte = ((pte_t *) pa2va(pgtb_addr)) + ti;
- *pte = (pte_t) (page_addr | PAGE_P | PAGE_WR);
+ *pte = (pte_t) (page_addr | PAGE_P | PAGE_WR | PAGE_US);
}
for(i=delta; i<PDECNT_PER_PAGE; ++i)
{
init_pgd[i] = init_pgd[i-delta];
+ init_pgd[i] |= PAGE_US;
}
// paging for user space
- set_page_shared(sysexit);
+ // set_page_shared(sysexit);
LOAD_CR3(init_pgd);
}
./configure --with-x11 --with-wx --with-svga --enable-cpu-level=6 --enable-smp --enable-configurable-msrs --enable-a20-pin --enable-idle-hack --enable-pnic --enable-e1000 --enable-fast-function-calls --enable-debugger --enable-readline --enable-disasm --enable-show-ips --enable-logging --enable-usb --enable-usb-ohci --enable-usb-xhci --enable-ne2000 --enable-sb16
+
+./configure --with-x11 --enable-cpu-level=6 --enable-sep --enable-configurable-msrs --enable-a20-pin --enable-idle-hack --enable-debugger --enable-readline --enable-disasm --enable-show-ips
+
+./configure --with-x11 --enable-cpu-level=6 --enable-configurable-msrs --enable-a20-pin --enable-debugger --enable-readline --enable-disasm --enable-show-ips
*(.init.data);
}
-
end = .;
_end = .;
kernel_end = ALIGN(0x1000);
init_mm();
-
setup_gdt();
setup_idt();
setup_gate();
detect_cpu();
-
set_tss();
setup_sysc();
setup_irqs();
+ return;
while(1); // TODO MODIFY CODE BELOW
setup_tasks();
enable_irq(0x00);
enable_irq(0x01);
enable_irq(0x0E);
- asm("sti");
+ //asm("sti");
+ asm("cli");
/*
pIRQAction pKbdAction, pClkAction;