switch (m->m_type) {
case BUSC_I2C_RESERVE:
/* reserve a device on the bus for exclusive access */
- r = do_reserve(m->m_source, m->BUSC_I2C_ADDR);
+ r = do_reserve(m->m_source, m->m_li2cdriver_i2c_busc_i2c_reserve.addr);
break;
case BUSC_I2C_EXEC:
/* handle request from another driver */
*/
#define BUSC_I2C_RESERVE (BUSC_RQ_BASE + 64) /* reserve i2c device */
-#define BUSC_I2C_ADDR m2_i1 /* slave address */
#define BUSC_I2C_EXEC (BUSC_RQ_BASE + 65) /* perform i2c action */
#define BUSC_I2C_GRANT m2_i1 /* grant for request */
} mess_pm_lexec_exec_new;
_ASSERT_MSG_SIZE(mess_pm_lexec_exec_new);
+typedef struct {
+ uint16_t addr; /* FIXME: strictly speaking this is an i2c_addr_t, but
+ to get it I would need to include
+ sys/dev/i2c/i2c_io.h, which I am not sure is a good
+ idea to have everywhere. */
+
+ uint8_t padding[54];
+} mess_li2cdriver_i2c_busc_i2c_reserve;
+_ASSERT_MSG_SIZE(mess_li2cdriver_i2c_busc_i2c_reserve);
+
+typedef struct {
+ uint8_t padding[56];
+} mess_i2c_li2cdriver_busc_i2c_reserve;
+_ASSERT_MSG_SIZE(mess_i2c_li2cdriver_busc_i2c_reserve);
+
typedef struct {
uint32_t flags;
endpoint_t endpoint;
mess_fs_vfs_readsuper m_fs_vfs_readsuper;
mess_fs_vfs_readwrite m_fs_vfs_readwrite;
+ mess_i2c_li2cdriver_busc_i2c_reserve m_i2c_li2cdriver_busc_i2c_reserve;
+
mess_lc_pm_exec m_lc_pm_exec;
mess_lc_pm_exit m_lc_pm_exit;
mess_lc_pm_getsid m_lc_pm_getsid;
mess_lexec_pm_exec_new m_lexec_pm_exec_new;
+ mess_li2cdriver_i2c_busc_i2c_reserve m_li2cdriver_i2c_busc_i2c_reserve;
+
mess_lsys_krn_schedctl m_lsys_krn_schedctl;
mess_lsys_krn_schedule m_lsys_krn_schedule;
message m;
m.m_type = BUSC_I2C_RESERVE;
- m.BUSC_I2C_ADDR = address;
+ m.m_li2cdriver_i2c_busc_i2c_reserve.addr = address;
r = ipc_sendrec(bus_endpoint, &m);
if (r != OK) {