From: Arun Thomas <arun@minix3.org>
Date: Wed, 27 May 2009 23:35:34 +0000 (+0000)
Subject: Support for VMWare Workstation 6.x
X-Git-Tag: v3.1.5~243
X-Git-Url: http://zhaoyanbai.com/repos/%22/xml/v3/zones/static/Bv9ARM.ch05.html?a=commitdiff_plain;h=dac531addfd3574f0b237ce18e990ce4b9ec0543;p=minix.git

Support for VMWare Workstation 6.x

VMWare Workstation 6.x would previously die when running MINIX 3 with an
IOSPACE assertion and several error messages about multiply registered
I/O ports. The assertion is triggered when we probe for BAR sizes in
record_bar(). The solution: The PCI driver now disables I/O and mem
access before probing for BAR sizes.

Bumped up NR_PCIDEV and NR_PCIBUS, since Workstation 6.x virtualizes
more PCI buses and devices.
---

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 05b5b3070..9861087ba 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -33,8 +33,8 @@ Created:	Jan 2000 by Philip Homburg <philip@cs.vu.nl>
 #include <string.h>
 #include <minix/sysutil.h>
 
-#define NR_PCIBUS	10
-#define NR_PCIDEV	40
+#define NR_PCIBUS       40
+#define NR_PCIDEV       50
 
 #define PBT_INTEL_HOST	 1
 #define PBT_PCIBRIDGE	 2
@@ -1135,16 +1135,24 @@ int bar_nr;
 {
 	int reg, prefetch, type, dev_bar_nr;
 	u32_t bar, bar2;
+	u16_t cmd;
 
 	reg= PCI_BAR+4*bar_nr;
 
 	bar= pci_attr_r32_u(devind, reg);
 	if (bar & PCI_BAR_IO)
 	{
-		/* Size register */
+		/* Disable I/O access before probing for BAR's size */
+		cmd = pci_attr_r16(devind, PCI_CR);
+		pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_IO_EN);
+
+		/* Probe BAR's size */
 		pci_attr_w32(devind, reg, 0xffffffff);
 		bar2= pci_attr_r32_u(devind, reg);
+
+		/* Restore original state */
 		pci_attr_w32(devind, reg, bar);
+		pci_attr_w16(devind, PCI_CR, cmd);
 
 		bar &= ~(u32_t)3;	/* Clear non-address bits */
 		bar2 &= ~(u32_t)3;
@@ -1168,10 +1176,17 @@ int bar_nr;
 	}
 	else
 	{
-		/* Size register */
+		/* Disable mem access before probing for BAR's size */
+		cmd = pci_attr_r16(devind, PCI_CR);
+		pci_attr_w16(devind, PCI_CR, cmd & ~PCI_CR_MEM_EN);
+
+		/* Probe BAR's size */
 		pci_attr_w32(devind, reg, 0xffffffff);
 		bar2= pci_attr_r32_u(devind, reg);
+
+		/* Restore original values */
 		pci_attr_w32(devind, reg, bar);
+		pci_attr_w16(devind, PCI_CR, cmd);
 
 		if (bar2 == 0)
 			return;	/* Reg. is not implemented */
@@ -2398,7 +2413,7 @@ u32_t value;
 #if 0
 	printf("pcii_wreg32(%d, %d, 0x%X, 0x%X): %d.%d.%d\n",
 		busind, devind, port, value,
-		pcibus[busind].pb_bus, pcidev[devind].pd_dev,
+		pcibus[busind].pb_busnr, pcidev[devind].pd_dev,
 		pcidev[devind].pd_func);
 #endif
 	PCII_WREG32_(pcibus[busind].pb_busnr, 
diff --git a/include/ibm/pci.h b/include/ibm/pci.h
index b546f217a..7fd0c0b84 100644
--- a/include/ibm/pci.h
+++ b/include/ibm/pci.h
@@ -9,6 +9,7 @@ Created:	Jan 2000 by Philip Homburg <philip@cs.vu.nl>
 #define PCI_DID		0x02	/* Device ID, 16-bit */
 #define PCI_CR		0x04	/* Command Register, 16-bit */
 #define		PCI_CR_MAST_EN	0x0004	/* Enable Busmaster Access */
+#define		PCI_CR_MEM_EN	0x0002	/* Enable Mem Cycles */
 #define		PCI_CR_IO_EN	0x0001	/* Enable I/O Cycles */
 #define PCI_SR		0x06	/* PCI status, 16-bit */
 #define		 PSR_SSE	0x4000	/* Signaled System Error */