--- /dev/null
+#ifndef FPU_H
+#define FPU_H
+
+/* x87 FPU state, MMX Technolodgy.
+ * 108 bytes.*/
+struct fpu_regs_s {
+ u16_t fp_control; /* control */
+ u16_t fp_unused_1;
+ u16_t fp_status; /* status */
+ u16_t fp_unused_2;
+ u16_t fp_tag; /* register tags */
+ u16_t fp_unused_3;
+ u32_t fp_eip; /* eip at failed instruction */
+ u16_t fp_cs; /* cs at failed instruction */
+ u16_t fp_opcode; /* opcode of failed instruction */
+ u32_t fp_dp; /* data address */
+ u16_t fp_ds; /* data segment */
+ u16_t fp_unused_4;
+ u16_t fp_st_regs[8][5]; /* 8 80-bit FP registers */
+};
+
+/* x87 FPU, MMX Technolodgy and SSE state.
+ * 512 bytes (if you need size use FPU_XFP_SIZE). */
+struct xfp_save {
+ u16_t fp_control; /* control */
+ u16_t fp_status; /* status */
+ u16_t fp_tag; /* register tags */
+ u16_t fp_opcode; /* opcode of failed instruction */
+ u32_t fp_eip; /* eip at failed instruction */
+ u16_t fp_cs; /* cs at failed instruction */
+ u16_t fp_unused_1;
+ u32_t fp_dp; /* data address */
+ u16_t fp_ds; /* data segment */
+ u16_t fp_unused_2;
+ u32_t fp_mxcsr; /* MXCSR */
+ u32_t fp_mxcsr_mask; /* MXCSR_MASK */
+ u16_t fp_st_regs[8][8]; /* 128 bytes for ST/MM regs */
+ u32_t fp_xreg_word[32]; /* space for 8 128-bit XMM registers */
+ u32_t fp_padding[56];
+};
+
+/* Size of xfp_save structure. */
+#define FPU_XFP_SIZE 512
+
+union fpu_state_u {
+ struct fpu_regs_s fpu_regs;
+ struct xfp_save xfp_regs;
+};
+
+#endif /* #ifndef FPU_H */
--- /dev/null
+#ifndef STACK_FRAME_H
+#define STACK_FRAME_H
+
+typedef unsigned reg_t; /* machine register */
+typedef reg_t segdesc_t;
+
+/* The stack frame layout is determined by the software, but for efficiency
+ * it is laid out so the assembly code to use it is as simple as possible.
+ * 80286 protected mode and all real modes use the same frame, built with
+ * 16-bit registers. Real mode lacks an automatic stack switch, so little
+ * is lost by using the 286 frame for it. The 386 frame differs only in
+ * having 32-bit registers and more segment registers. The same names are
+ * used for the larger registers to avoid differences in the code.
+ */
+struct stackframe_s {
+ u16_t gs; /* last item pushed by save */
+ u16_t fs; /* ^ */
+ u16_t es; /* | */
+ u16_t ds; /* | */
+ reg_t di; /* di through cx are not accessed in C */
+ reg_t si; /* order is to match pusha/popa */
+ reg_t fp; /* bp */
+ reg_t st; /* hole for another copy of sp */
+ reg_t bx; /* | */
+ reg_t dx; /* | */
+ reg_t cx; /* | */
+ reg_t retreg; /* ax and above are all pushed by save */
+ reg_t retadr; /* return address for assembly code save() */
+ reg_t pc; /* ^ last item pushed by interrupt */
+ reg_t cs; /* | */
+ reg_t psw; /* | */
+ reg_t sp; /* | */
+ reg_t ss; /* these are pushed by CPU during interrupt */
+};
+
+#endif /* #ifndef STACK_FRAME_H */