Change-Id: Iabe6dfd758e8f1cdb4a18e2f2ab8f8ca988f3c86
*/
#define ARM_STACK_TOP_RESERVED (2 * sizeof(reg_t))
+/* only selected bits are changeable by user e.g.[31:9] and skip the
+ * mode bits. It is probably is a better idea to look at the current
+ * status to determine if one is allowed to write these values. This
+ * might allow debugging of privileged processes
+ */
+#define SET_USR_PSR(rp, npsr) \
+ rp->p_reg.psr = ( rp->p_reg.psr & 0x1F) | ( npsr & ~0x1F)
+
+
#define PG_ALLOCATEME ((phys_bytes)-1)
#endif /* _ARM_ACONST_H */
SETPSW(rp, tr_data);
else
*(reg_t *) ((char *) &rp->p_reg + i) = (reg_t) tr_data;
+#else
+ if (i == (int) &((struct proc *) 0)->p_reg.psr) {
+ /* only selected bits are changeable */
+ SET_USR_PSR(rp, tr_data);
+ } else {
+ *(reg_t *) ((char *) &rp->p_reg + i) = (reg_t) tr_data;
+ }
#endif
m_ptr->CTL_DATA = 0;
break;