int devind, i;
int ind, type;
u16_t vid, did;
- u8_t sbusn;
+ u8_t sbusn, baseclass, subclass, infclass;
+ u32_t t3;
vid= did= 0; /* lint */
for (devind= 0; devind< nr_pcidev; devind++)
break;
}
if (pci_pcibridge[i].vid == 0)
+ {
+ if (debug)
+ {
+ /* Report unsupported bridges */
+ baseclass= pci_attr_r8(devind, PCI_BCR);
+ subclass= pci_attr_r8(devind, PCI_SCR);
+ infclass= pci_attr_r8(devind, PCI_PIFR);
+ t3= ((baseclass << 16) | (subclass << 8) |
+ infclass);
+ if (t3 != PCI_T3_PCI2PCI &&
+ t3 != PCI_T3_PCI2PCI_SUBTR)
+ {
+ /* No a PCI-to-PCI bridge */
+ continue;
+ }
+ printf(
+ "Ignoring unknown PCI-to-PCI bridge: %04X/%04X\n",
+ vid, did);
+ }
continue;
+ }
type= pci_pcibridge[i].type;
if (debug)
#define PCI_ILR 0x3C /* Interrupt Line Register */
#define PCI_IPR 0x3D /* Interrupt Pin Register */
+/* Device type values as ([PCI_BCR] << 16) | ([PCI_SCR] << 8) | [PCI_PIFR] */
+#define PCI_T3_PCI2PCI 0x060400 /* PCI-to-PCI Bridge device */
+#define PCI_T3_PCI2PCI_SUBTR 0x060401 /* Subtr. PCI-to-PCI Bridge */
+
/* PCI bridge devices (AGP) */
#define PPB_SBUSN 0x19 /* Secondary Bus Number */